It is a device that has multiple input streams and only one output stream.It is the basic building block for many combinational circuits. Example: Adder. The multiplexers will be available in the order of 4^n : 1Mux Example: 4:1,Mux, 16:1Mux, 64:1Mux.
Multi valued logic
Monday, 7 May 2012
Quaternary logic(radix-4)
It will have 4 states .Those are 0V,0.4V,0.8V,1.2V for simplicity we can consider as 0V,1V,2V,3V
To drive these four states we will have three power supplies.We can implement Quaternary logic in two ways.
i.e. 1) Through NMOS Logic
2) Through CMOS Logic
To drive these four states we will have three power supplies.We can implement Quaternary logic in two ways.
i.e. 1) Through NMOS Logic
2) Through CMOS Logic
solution
MVL (Multi Valued Logic):
The information processed in circuits can be represented by Nodal Voltages(Voltage Mode MVL) or Branch
Currents(Current Mode MVL).The Voltage mode MVL has become more popular because of its simplicity nodal voltage measurements with out any changes in circuit topology. The higher radix in use is the Ternary logic and Quaternary logic.
The information processed in circuits can be represented by Nodal Voltages(Voltage Mode MVL) or Branch
Currents(Current Mode MVL).The Voltage mode MVL has become more popular because of its simplicity nodal voltage measurements with out any changes in circuit topology. The higher radix in use is the Ternary logic and Quaternary logic.
Background
In a VLSI circuit approximately
70% - Inter connections
20% - Insulation
10% - Device
Increasing circuit density is a constraint for Giving Interconnections N= R^d
Where,
N- Range (No. of interconnections)
R- Radix
d- no of digits required to represent range
70% - Inter connections
20% - Insulation
10% - Device
Increasing circuit density is a constraint for Giving Interconnections N= R^d
Where,
N- Range (No. of interconnections)
R- Radix
d- no of digits required to represent range
Introduction
Binary logic is may not be a promising technology in the future, to satisfy the ‘Moores Law’. Because of having the less states which leads to more interconnections between the components.This problem is overcomed by using a large set of signals over the same area. Which is called “Multi-valued Logic”.
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